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TCM4400EPET bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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TCM4400EPET bảng dữ liệu(HTML) 7 Page - Texas Instruments |
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7 / 64 page ![]() TCM4400E GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT SLWS082A – JULY 1999 – REVISED MARCH 2000 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, AVDD, DVDD (see Note 1) – 0.3 to 6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum voltage on any input, VI max VDD +0.3 V / VSS –0.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum junction temperature, TJ 150 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: Voltage measurements with respect to GND. recommended operating conditions MIN NOM MAX UNIT Supply voltage range (AVDD, DVDD) 2.7 3.0 3.3 Vdc Operating temperature range –25 85 °C Digital I/O voltage with respect to DVSS – 0.3 DVDD + 0.3 Vdc Analog I/O voltage with respect to AVSS – 0.3 AVDD + 0.3 V Difference between any AVDD or DVDD 0.3 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) digital inputs and outputs PARAMETER MIN TYP MAX UNIT Low-level output current with digital pad lower than 0.1 V (CMOS) 0 40 µA Low-level output current with digital pad lower than 0.4 V (TTL) 0 1 mA High-level output current with digital pad higher than VDD–0.1 V (CMOS) –40 0 µA High-level output current with digital pad higher than VDD–0.4 V (TTL) –1 0 mA Minimum high-level input voltage, VIH Vdd–0.3 V Maximum low level input voltage, VIL Vss+0.3 V Output current on high impedance state outputs –15 15 µA Input current (any input) when input high –1 µA Input current (standard inputs) when input low 1 µA Input current (inputs with pullup TMS, TDI ,TEST1 ,TEST2) when input low 15 µA |
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