TCM4400EPET datasheet(56/64 Pages) TI

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TCM4400E

GSM/DCS BASEBAND AND VOICE A/D

AND D/A RF INTERFACE CIRCUIT

SLWS082A – JULY 1999 – REVISED MARCH 2000

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

automatic frequency control registers (1 and 2)

There are two AFC control registers; each is 10 bits wide. AFC control register No. 1 contains the least significant

bit of the AFC D/A converter output. AFC control register No. 2 contains the most significant bit of the AFC D/A

converter input. See Tables 27 and 28. The AFC value is loaded after writing to the AFC MSB register (first) and

then the LSB register (second) .

Table 27. AFC Control Register 1

AUXAFC1: AUTOMATIC FREQUENCY CONTROL REG1

ADDRESS: 14

R/W

BIT9

BIT8

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

1/0

R/W

<–ACCESS TYPE

<–VALUE AT RESET

BIT 9–0:

LSB input of the 13-bit AFC D/A converter in 2s complement.

Table 28. AFC Control Register 2

AUXAFC2: AUTOMATIC FREQUENCY CONTROL REG2

ADDRESS: 15

R/W

RESRVD

BIT12

BIT11

BIT10

1/0

R = 0

R/W

<–ACCESS TYPE

<–VALUE AT RESET

BIT 12–10:

MSB input of the 13-bit AFC D/A converter in 2s complement.

automatic power control register

The values in the automatic power control (APC) register set the operating conditions for the APC circuit, see

Table 29.

Table 29. APC Register

AUXAPC: AUTOMATIC POWER CONTROL REGISTER

ADDRESS: 16

R/W

RESERVD

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

1/0

R = 0

R/W

<–ACCESS TYPE

<–VALUE AT RESET

BIT 7–0:

Input of the 8-bit level APC DAC.

RESERVD:

Reserved bits for testing

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