TCM4400EPET datasheet(35/64 Pages) TI

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TCM4400E

GSM/DCS BASEBAND AND VOICE A/D

AND D/A RF INTERFACE CIRCUIT

SLWS082A – JULY 1999 – REVISED MARCH 2000

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

DAI interface

This digital audio interface (DAI) consists of four terminals: SSRST, SSCLK, SSDR, and SSDX. It is compatible

with the digital audio interface described in the GSM recommendation 11.10. This interface is designed to offer

minimum CPU overhead during audio tests and speech transcoding tests and to minimize the extra hardware

and the number of external terminals of the mobile system (MS). With this interface the DSP does not have to

deal with rate adaptation. In normal operation the DSP works with an 8-kHz sampling rate with a 16-bit word

format and frame synchronization, but the DAI interface works with an 8-kHz sampling rate with a 13-bit word

format without frame synchronization. The DSP (or the MCU) does not have real time constraints with SSRST,

since the reset of the internal transmitters is done automatically.

The DAI is controlled with four internal bits of VBCTL3 register:

DAION:

When 0, the DAI block is put in low power. When 1, the DAI block is active.

VDAI:

This bit controls the start of the clock SSCLK. The falling edges of SSRST automatically resets the

VDAI.

DAIMD 0/1: These two bits are used to switch the internal data path of the three types of DAI tests:

Tests of acoustic performance of the uplink/downlink voice path

Tests of speech decoder/DTX functions (downlink path)

Tests of speech encoder/DTX functions (uplink path)

In order to correctly execute these tests, the bits DAION/VULON/VDLON must be reset before starting the DAI

test. In the case of acoustic tests the following must be set with the sequence: DAION and VDAI, then VULON,

and finally VDLON. In case of vocoder tests, when the speech samples are ready to be exchanged with the

system simulator, the bits DAION and VDAI must be set at the same time.

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