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TDF8599TH bảng dữ liệu(PDF) 35 Page - NXP Semiconductors

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TDF8599TH bảng dữ liệu(HTML) 35 Page - NXP Semiconductors

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TDF8599_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 13 November 2008
35 of 52
NXP Semiconductors
TDF8599
Class-D power amplifier with load diagnostics
14.2 Output power estimation (Parallel mode)
Figure 29 and Figure 30 show the estimated output power at THD = 0.5 % and
THD = 10 % as a function of the supply voltage for different load impedances in parallel
mode.
14.3 Output current limiting
The peak output current is internally limited to 8 A maximum. During normal operation, the
output current should not exceed this threshold level otherwise the output signal will be
distorted. The peak output current can be estimated using the following equation:
(6)
• Io = output current (A)
• VP = supply voltage (V)
• RL = load impedance (Ω)
• RDSon = on-resistance power switch (Ω)
• RS = series resistance output inductor (Ω)
Example: A 1
Ω speaker can be used with a supply voltage of 11 V before current limiting
is triggered.
Current limiting (clipping) avoids audio holes but can cause distortion similar to voltage
clipping. In Parallel mode, the output current is internally limited above 16 A.
THD = 0.5 %.
(1) RDSon = 0.06 Ω (at Tj =25 °C), RS = 0.0125 Ω,
tW(min) = 130 ns and IO(ocp) = 16 A (minimum).
(2) RL =1 Ω.
(3) RL =2 Ω.
(4) RL =4 Ω.
THD = 10 %.
(1) RDSon = 0.06 Ω (at Tj =25 °C), RS = 0.0125 Ω,
tW(min) = 130 ns and IO(ocp) = 16 A (minimum).
(2) RL =1 Ω.
(3) RL =2 Ω.
(4) RL =4 Ω.
Fig 29. Po as a function of Vp in parallel mode with
THD = 0.5 %
Fig 30. Po as a function of Vp parallel mode with
THD = 10 %
VP (V)
818
16
12
14
10
(1)
001aai798
80
40
120
160
Po
(W)
0
(3)
(2)
VP (V)
818
16
12
14
10
(1)
001aai799
80
40
120
160
Po
(W)
0
(3)
(2)
I
o
V
p
R
L
2
+
R
RSon
R
S
+
()
×
------------------------------------------------------
8 A
≤≤



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