M16CSLASH62 datasheet(156/615 Pages) RENESAS

156 / 615 page

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

UART2 Special Mode Register

1-137

UART2 Special Mode Register

The UART2 special mode register (address 037716) is used to control UART2 in various ways.

Figure 1.16.26 shows the UART2 special mode register.

Bit 0 of the UART2 special mode register (037716) is used as the I2C mode select bit.

Setting “1” in the I2C mode select bit (bit 0) goes the circuit to achieve the I2C bus (simplified I2C bus)

interface effective.

Table 1.16.9 shows the relation between the I2C mode select bit and respective control workings.

Since this function uses clock-synchronous serial I/O mode, set this bit to “0” in UART mode.

Figure 1.16.26. UART2 special mode register

UART2 special mode register

Symbol

Address

When reset

U2SMR

037716

0016

b4 b3

Bit

name

Bit

symbol

Function

(During UART mode)

Function

(During clock synchronous

serial I/O mode)

ABSCS

ACSE

SSS

I2C mode select bit

Bus busy flag

0 : STOP condition detected

1 : START condition detected

SCL L sync output

enable bit

Bus collision detect

sampling clock select bit

Arbitration lost detecting

flag control bit

0 : Normal mode

1 : I2C mode

0 : Update per bit

1 : Update per byte

IICM

ABC

BBS

LSYN

0 : Ordinary

1 : Falling edge of RxD2

0 : Disabled

1 : Enabled

Transmit start condition

select bit

Must always be “0”

0 : Rising edge of transfer

clock

1 : Underflow signal of timer A0

Auto clear function

select bit of transmit

enable bit

0 : No auto clear function

1 : Auto clear at occurrence of

bus collision

Must always be “0”

Note 1: Nothing but “0” may be written.

Note 2: When not in I2C mode, do not set this bit by writing a “1”. During normal mode, fix it to “0”. When this

bit = “0”, UART2 special mode register 3 (U2SMR3 at address 037516) bits 7 to 5 (DL2 to DL0 = SDA

digital delay setup bits) are initialized to “000”, with the analog delay circuit selected. Also, when SDDS

= “0”, the U2SMR3 register cannot be read or written to.

Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,

only the digital delay value is effective.

(Note1)

SDDS

SDA digital delay select

bit (Note 2, Note 3)

Must always be “0”

0 : Analog delay output

is selected

1 : Digital delay output

is selected

(must always be “0” when

not using I C mode)

UART2 special mode register 3 (I C bus exclusive use register)

Symbol

Address

When reset

U2SMR3

037516

Indeterminate

(However, when SDDS = “1”, the initial value is “0016”)

b6 b5

Bit name

Bit

symbol

Function

(I C bus exclusive use register)

DL2

SDA digital delay setup

bit

(Note 1, Note 2, Note 3,

Note 4)

DL0

DL1

0 0 0 : Analog delay is selected

0 0 1 : 1 to 2 cycle(s) of 1/f(XIN)

0 1 0 : 2 to 3 cycles of 1/f(XIN)

0 1 1 : 3 to 4 cycles of 1/f(XIN)

1 0 0 : 4 to 5 cycles of 1/f(XIN)

1 0 1 : 5 to 6 cycles of 1/f(XIN)

1 1 0 : 6 to 7 cycles of 1/f(XIN)

1 1 1 : 7 to 8 cycles of 1/f(XIN)

Nothing is assigned.

In an attempt to write to these bits, write “0”. The value, if read, turns out to be

indeterminate. However, when SDDS = “1”, the value “0” is read out (Note 1)

b7 b6 b5

Note 1: This bit can be read or written to when UART2 special mode register (U2SMR at address 037716) bit

7 (SDDS: SDA digital delay select bit) = “1”. When the initial value of UART2 special mode register 3

(U2SMR3) is read after setting SDDS = “1”, the value is “0016”. When writing to UART2 special mode

this register cannot be written to; when read, the value is indeterminate.

Note 2: These bits are initialized to “000” when SDDS = “0”, with the analog delay circuit selected. After a reset,

these bits are set to “000”, with the analog delay circuit selected. However, because these bits can be

read only when SDDS = “1”, the value read from these bits when SDDS = “0” is indeterminate.

Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,

only the digital delay value is effective.

Note 4: The amount of delay varies with the load on SCL and SDA pins. Also, when using an external clock, the

amount of delay increases by about 100 ns, so be sure to take this into account when using the device.

Digital delay

is selected

M16C/62 bảng dữ liệu(PDF) 156 Page - Renesas Technology Corp

M16C/62 bảng dữ liệu(HTML) 156 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL