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7643 bảng dữ liệu(PDF) 206 Page - Renesas Technology Corp

tên linh kiện 7643
Giải thích chi tiết về linh kiện  8-BIT SINGLE-CHIP MICROCOMPUTER
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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Rev.2.00
Aug 28, 2006
page 85 of 202
7643 Group
REJ09B0133-0200
APPLICATION
2.5 DMAC
(3) DMA execution
The selected channel transfers one byte of data from the address indicated by its source register
(address 4216 or 4316) into the address indicated by its destination register (address 4416 or 4516)
with at 2 cycles of
φ.
The operataion of the source registers and destination registers after transfer completion can be
selected between decreased/increased by 1 and no change with bits 0 to 3 in the DMAC channel
x mode register 1.
When the transfer count register underflows, the source registers and destination registers are
reloaded from their latches when the DMAC register reload disable bit (DRLDD) is “0”. If the
DRLDD bit is set to “1”, a reload is disabled.
A read/write must be performed to the source registers, destination registers and transfer count
registers as follows:
Read from each higher byte first, then the lower byte
Write to each lower byte first, then the higher byte.
Figure 2.5.12 shows the basic operation of registers transferring.
Tables 2.5.1 and 2.5.2 shows the address directions and examples of transfer result.
(1) Read cycle
DMAC
DMAC
DMAxSL, DMAxSH
DMAxSL, DMAxSH latch
DMAxDL, DMAxDH
DMAxDL, DMAxDH latch
DMAxCL, DMAxCH
DMAxCL, DMAxCH latch
Temporary register
Incrementer/
Decrementer
Decrementer
Transfer
source
Transfer
destination
➀
➁
➂
➃
➀Transfer source address is specified.
➁Contents of DMAxCL, DMAxCH are
updated by Decrementer.
➂Contents of DMAxSL, DMAxSH are
updated by Incrementer/Decrementer.
➃Data is read
from
memory
and
retained in Temporary register.
Memory
(2) Write cycle
DMAxSL, DMAxSH
DMAxSL, DMAxSH latch
DMAxDL, DMAxDH
DMAxDL, DMAxDH latch
DMAxCL, DMAxCH
DMAxCL, DMAxCH latch
Temporary register
Incrementer/
Decrementer
Decrementer
➄
➅
➆
Transfer
source
Transfer
destination
Memory
Transfer
source
Memory
➄Transfer destination address is specified.
➅Contents of DMAxDL, DMAxDH are
updated by Incrementer/Decrementer.
➆Contents of temporary register is written
into memory.
Note: The temporary register is an internal use register, so that it cannot be read out or written into by program.
Fig. 2.5.12 Basic operation of registers transferring



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