7643 datasheet(171/424 Pages) RENESAS

171 / 424 page

Rev.2.00

Aug 28, 2006

page 50 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.4 UART

Figure 2.4.15 shows the registers setting for the transmitter, and Figures 2.4.16 and 2.4.17 show

the registers setting for the receiver.

Fig. 2.4.15 Registers setting for transmitter

UMOD

UBRG

4D16

0 0 1

UCON

USTS

UTRB1

UTRB2

ICONA

Transmitting side

UART mode register (Address : 3016)

UART control register (Address : 3316)

UART clock :

φ/1

Character length : 8 bits

Parity checking disabled

Stop bit length : 2 stop bits

Transmit enabled

Receive disabled

UART address mode disabled

Transmit initializing

CTS function enabled

RTS function disabled

UART baud rate generator (Address : 3116)

UART transmit interrupt disabled

UART transmit/receive buffer register 2 (Address : 3516)

Interrupt control register A (Address : 0516)

high-order 1 bit of transmitting data set

low-order 8 bits of transmitting data set

UART status register (Address : 3216)

Transmit complete flag

Transmit buffer empty flag

Write data to high-order address first,

then to low-order address.

UART transmit/receive buffer register 1 (Address : 3416)

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