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HD64F2149YV bảng dữ liệu(PDF) 326 Page - Renesas Technology Corp

tên linh kiện HD64F2149YV
Giải thích chi tiết về linh kiện  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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HD64F2149YV bảng dữ liệu(HTML) 326 Page - Renesas Technology Corp

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Section 10 14-Bit PWM Timer
Rev. 3.00 Jan 18, 2006 page 298 of 1044
REJ09B0280-0300
Bit 1—Carrier Frequency Select (CFS)
Bit 1
CFS
Description
0
Base cycle = resolution (T)
× 64
DADR range = H'0401 to H'FFFD
1
Base cycle = resolution (T)
× 256
DADR range = H'0103 to H'FFFF
(Initial value)
DADRA Bit 0—Reserved: This bit cannot be modified and is always read as 1.
DADRB Bit 0—Register Select (REGS): DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies which registers can be accessed. The REGS
bit can be accessed regardless of whether DADRB or DACNT is selected.
Bit 0
REGS
Description
0
DADRA and DADRB can be accessed
1
DACR and DACNT can be accessed
(Initial value)
10.2.3
PWM (D/A) Control Register (DACR)
7
TEST
0
R/W
6
PWME
0
R/W
5
—
1
—
4
—
1
—
3
OEB
0
R/W
0
CKS
0
R/W
2
OEA
0
R/W
1
OS
0
R/W
Bit
Initial value
Read/Write
DACR is an 8-bit readable/writable register that selects test mode, enables the PWM outputs, and
selects the output phase and operating speed.
DACR is initialized to H'30 by a reset, and in the standby modes, watch mode, subactive mode,
subsleep mode, and module stop mode.



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