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HD64F2149YV bảng dữ liệu(PDF) 128 Page - Renesas Technology Corp |
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HD64F2149YV bảng dữ liệu(HTML) 128 Page - Renesas Technology Corp |
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128 / 1075 page ![]() Section 4 Exception Handling Rev. 3.00 Jan 18, 2006 page 100 of 1044 REJ09B0280-0300 4.6 Notes on Use of the Stack When accessing word data or longword data, the chip assumes that the lowest address bit is 0. The stack should always be accessed by word transfer instruction or longword transfer instruction, and the value of the stack pointer (SP: ER7) should always be kept even. Use the following instructions to save registers: PUSH.W Rn (or MOV.W Rn, @-SP) PUSH.L ERn (or MOV.L ERn, @-SP) Use the following instructions to restore registers: POP.W Rn (or MOV.W @SP+, Rn) POP.L ERn (or MOV.L @SP+, ERn) Setting SP to an odd value may lead to a malfunction. Figure 4.6 shows an example of what happens when the SP value is odd. SP Legend: CCR: Condition-code register PC: Program counter R1L: General register R1L SP: Stack pointer Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode. SP SP CCR PC R1L PC H'FFFEFA H'FFFEFB H'FFFEFC H'FFFEFD H'FFFEFF MOV.B R1L, @–ER7 SP set to H'FFFEFF TRAP instruction executed Data saved above SP Contents of CCR lost Figure 4.6 Operation when SP Value is Odd |
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