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HD64F2149YV bảng dữ liệu(PDF) 120 Page - Renesas Technology Corp

tên linh kiện HD64F2149YV
Giải thích chi tiết về linh kiện  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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Section 4 Exception Handling
Rev. 3.00 Jan 18, 2006 page 92 of 1044
REJ09B0280-0300
4.1.2
Exception Handling Operation
Exceptions originate from various sources. Trap instructions and interrupts are handled as follows:
1. The program counter (PC) and condition-code register (CCR) are pushed onto the stack.
2. The interrupt mask bits are updated. The T bit is cleared to 0.
3. A vector address corresponding to the exception source is generated, and program execution
starts from that address.
For a reset exception, steps 2 and 3 above are carried out.
4.1.3
Exception Sources and Vector Table
The exception sources are classified as shown in figure 4.1. Different vector addresses are
assigned to different exception sources.
Table 4.2 lists the exception sources and their vector addresses.
Exception
sources
Reset
Trace
Interrupts
Direct transition
Trap instruction
(Cannot be used in the H8S/2169 or H8S/2149)
External interrupts: NMI, IRQ7 to IRQ0
Internal interrupts: interrupt sources in
on-chip supporting modules
Figure 4.1 Exception Sources



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