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M16C/29 bảng dữ liệu(PDF) 297 Page - Renesas Technology Corp

tên linh kiện M16C/29
Giải thích chi tiết về linh kiện  RENESAS MCU M16C FAMILY / M16C/Tiny SERIES
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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16. MULTI-MASTER I2C bus INTERFACE
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Figure 16.12 The timing of the interrupt generation at the completion of the data receive
16.6.3 Bits 2,3 : Port Function Select Bits PED, PEC
If the ES0 bit in the S1D0 register is set to 1 (I2C bus interface enabled), the SDAMM functions as an
output port. When the PED bit is set to 1 and the SCLMM functions as an output port when the PEC bit is
set to 1. Then the setting values of bits P2_0 and P2_1 in the port P2 register are output to the I2C bus,
regardless of he internal SCL/SDA output signals. (SCL/SDA pins are onnected to I2C bus interface
circuit)
The bus data can be read by reading the port pi direction register in input mode, regardless of the setting
values of the PED and PEC bits. Table 16.5 shows the port specification.
Table 16.5 Port specifications
In receive mode, ACK bit = 1 WIT bit = 0
7 clock
8 clock
ACK
clock
1 clock
1 bit
7 bit
8 bit
ACK bit
SCL
SDA
ACKBIT bit
PIN flag
Internal WAIT flag
I2C bus interface
interrupt request signal
The writing signal of
the S00 register
7 clock
8 clock
ACK
clock
1 bit
7 bit
8 bit
SCL
SDA
ACKBIT bit
PIN flag
Internal WAIT flag
I2C bus interface
interrupt request signal
The writing signal of
the S00 register
The writing signal of the S2
0 register
1)
NOTE:
1. Do not write to the I2C0 clock control register except the bit ACK-BIT.
In receive mode, ACK bit = 1 WIT bit = 1
2)
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