HD404848FS datasheet(18/127 Pages) RENESAS

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HD404849 Series

Table 1 Initial Values After MCU Reset

Item

Abbr.

Initial

Value

Contents

Program

counter

(PC)

$0000

Indicates program execution point from start

address of ROM area

Status flag

(ST)

Enables conditional branching

Stack pointer

(SP)

$3FF

Stack level 0

Interrupt

flags/mask

Interrupt enable flag

(IE)

Inhibits all interrupts

Interrupt request flag

(IF)

Indicates there is no interrupt request

Interrupt mask

(IM)

Prevents (masks) interrupt requests

I/O

Port data register

(PDR)

All bits 1

Enables output at level 1

Data control register

(DCD0,

DCD1)

All bits 0

Turns output buffer off (to high impedance)

(DCD2)

- - - 0

(DCR0–

DCR3,

DCR6,

DCR7)

All bits 0

Port mode register A

(PMRA)

- - 00

Refer to description of port mode register A

Port mode register B

(PMRB)

- 000

Refer to description of port mode register B

Port mode register C

bits 3, 1, 0

(PMRC3,

PMRC1,

PMRC0)

000

Refer to description of port mode register C

Detection edge select

(ESR1)

0000

Disables edge detection

Detection edge select

(ESR2)

00 - -

Disables edge detection

Timer/

counters,

serial

interface

Timer mode register A

(TMA)

0000

Refer to description of timer mode register A

Timer mode register B1 (TMB1)

0000

Refer to description of timer mode register B1

Timer mode register B2 (TMB2)

- - 00

Refer to description of timer mode register B2

Timer mode register C1 (TMC1)

0000

Refer to description of timer mode register

Timer mode register C2 (TMC2)

- 000

Refer to description of timer mode register

Timer mode register D1 (TMD1)

0000

Refer to description of timer mode register

Timer mode register D2 (TMD2)

0000

Refer to description of timer mode register

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