ST20-GP1 datasheet(89/116 Pages) STMICROELECTRONICS

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ST20-GP1

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PlinkEmi register

The PlinkEmi register determines the mode of operation of the port.

PlinkIO

The PlinkIO register determines the direction of the port interactions when in the DMA mode of

operation.

PlinkMode

The PlinkMode register determines the external protocol used for interactions.

15.4 External data transfer protocols

The byte-wide parallel port has three control pins. PlinknotReq and PlinknotAck control data

transfers and the PlinkOut pin controls external buffers, if required (e.g. an external 3V/5V buffer

device). When the PlinkOut pin is high it signals the plink is outputting.

The control pins can support three external protocols, as follows:

•

Dreq/Dack protocol

•

Valid/Ack protocol

•

Direct DMA protocol

The protocol used for interactions is programmable via the PlinkMode register. In addition, the

direction of the link is controlled by the PlinkIO register (see Table 15.2).

PlinkEmi

Parallel port base address + #00

Read/Write

Bit

Bit ﬁeld

Function

PlinkEmi

This bit determines the mode of operation of the port.

PlinkEmi

Mode

DMA mode (reset state)

EMI mode

Table 15.1 PlinkEmi register format

PlinkIO

Parallel port base address + #04

Read/Write

Bit

Bit ﬁeld

Function

PlinkIO

This bit controls the direction of the parallel port interactions when in DMA mode.

PlinkIO

Direction

inputs (reset state)

outputs

Table 15.2 PlinkIO register format

PlinkMode

Parallel port base address + #08

Read/Write

Bit

Bit ﬁeld

Function

PlinkMode

These bits control the external protocol used for interactions.

PlinkMode

Protocol

Idle (reset state)

Dreq/Dack mode

Valid/Ack mode

Direct mode

Table 15.3 PlinkMode register format

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