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TMP411 bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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TMP411 bảng dữ liệu(HTML) 10 Page - Texas Instruments |
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10 / 48 page ![]() 0.1µF TMP411 D+ D í V+ 1 8 7 6 4 5 3 2 RS RS CDIFF CDIFF GND SCL SDA ALERT/THERM2 THERM +5V SMBus Controller Fan Controller Diode íconnected configuration Series Resistance Transistor íconnected configuration Copyright © 2016, Texas Instruments Incorporated RS RS (2) (2) (3) (1) (3) (2) (2) (1): : 10 k Ÿ (typ) 10 k Ÿ (typ) 10 k Ÿ (typ) 10 k Ÿ (typ) 10 TMP411 SBOS383D – DECEMBER 2006 – REVISED DECEMBER 2016 www.ti.com Product Folder Links: TMP411 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated 9 Detailed Description 9.1 Overview The TMP411 is a dual-channel digital temperature sensor that combines a local die-temperature measurement channel in a single VSSOP-8 or SOIC-8 package. The TMP411 is two-wire and SMBus interface-compatible and is specified over a temperature range of –40°C to +125°C. The TMP411 device contains multiple registers for holding configuration information, temperature measurement results, temperature comparator maximum and minimum limits, and status information. User-programmed high and low temperature limits stored in the TMP411 triggers an overtemperature or undertemperature alarm (ALERT) on local and remote temperatures. Additional thermal limits can be programmed into the TMP411 and can trigger another flag (THERM) that initiates a system response to rising temperatures. The TMP411 requires only a transistor connected between D+ and D– for proper remote temperature sensing operation. The SCL and SDA interface pins require pullup resistors as part of the communication bus, while ALERT and THERM pins are open-drain outputs that require pullup resistors. ALERT and THERM pins can be shared with other devices for a wired-OR implementation, if desired. TI recommends using a 0.1-µF power- supply bypass capacitor for good local bypassing. Figure 11 shows a typical configuration for the TMP411 . (1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance cancellation. NPN transistors must be diode-connected. PNP transistors can either be transistor or diode- connected. TI recommends this layout for the MMBT3906LP and MMBT3904LP devices. (2) Rs (optional) must be < 1.5 kΩ in most applications. Selections of Rs depends on specific applications; see the Filtering section. (3) CDIFF (optional) must be < 1000 pF in most applications. Selection of CDIFF depends on specific application; see the Filtering section and Figure 5. Figure 11. Basic Connections |
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