TMP411 datasheet(17/48 Pages) TI2

17 / 48 page

Frame 1 Two−Wire Slave Address Byte

Frame 2 Pointer Register Byte

Start By

Master

ACK By

TMP411A

ACK By

TMP411A

Frame 3 Two−Wire Slave Address Byte

Frame 4 Data Byte 1 Read Register

Start By

Master

ACK By

TMP411A

NACK By

Master

(2)

From

TMP411A

SDA

SCL

R/W

SDA

(Continued)

SCL

(Continued)

(1)

R/W

Frame 1 TwoíWire Slave Address Byte

Frame 2 Pointer Register Byte

Frame 4 Data Byte 2

Start By

Master

ACK By

TMP411A

ACK By

TMP411A

ACK By

TMP411A

Stop By

Master

Frame 3 Data Byte 1

ACK By

TMP411A

SDA

(Continued)

SCL

(Continued)

SDA

SCL

(1)

R/W

TMP411

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SBOS383D – DECEMBER 2006 – REVISED DECEMBER 2016

Product Folder Links: TMP411

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Programming (continued)

(1)

Slave address 1001100 (TMP411A) shown. Slave address changes for TMP411B and TMP411C. See Ordering

Information table for more details.

Figure 13. Two-Wire Timing Diagram for Write Word Format

(1)

Slave address 1001100 (TMP411A) shown. Slave address changes for TMP411B and TMP411C. See Ordering

Information table for more details.

(2)

Master must leave the SDA high to terminate a single

−byte read operation.

Figure 14. Two-Wire Timing Diagram for Single-Byte Read Format

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