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ADC12D040CIVS/NOPB bảng dữ liệu(PDF) 23 Page - Texas Instruments |
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ADC12D040CIVS/NOPB bảng dữ liệu(HTML) 23 Page - Texas Instruments |
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23 / 31 page ![]() ADC12D040 www.ti.com SNAS171E – JUNE 2002 – REVISED MARCH 2013 POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 10 µF capacitor and with a 0.1 µF ceramic chip capacitor within a centimeter of each power pin. Leadless chip capacitors are preferred because they have low series inductance. As is the case with all high-speed converters, the ADC12D040 is sensitive to power supply noise. Accordingly, the noise on the analog supply pin should be kept below 100 mVP-P. No pin should ever have a voltage on it that is in excess of the supply voltages, not even on a transient basis. Be especially careful of this during turn on and turn off of power. The VDR pin provides power for the output drivers and may be operated from a supply in the range of 2.35V to VD (nominal 5V). This can simplify interfacing to low voltage devices and systems. Note, however, that tOD increases with reduced VDR. DO NOT operate the VDR pin at a voltage higher than VD. LAYOUT AND GROUNDING Proper grounding and proper routing of all signals are essential to ensure accurate conversion. Maintaining separate analog and digital areas of the board, with the ADC12D040 between these areas, is required to achieve specified performance. The ground return for the data outputs (DR GND) carries the ground current for the output drivers. The output current can exhibit high transients that could add noise to the conversion process. To prevent this from happening, the DR GND pins should NOT be connected to system ground in close proximity to any of the ADC12D040's other ground pins. Capacitive coupling between the typically noisy digital circuitry and the sensitive analog circuitry can lead to poor performance. The solution is to keep the analog circuitry separated from the digital circuitry, and to keep the clock line as short as possible. The effects of the noise generated from the ADC output switching can be minimized through the use of 100 Ω resistors in series with each data output line. Locate these resistors as close to the ADC output pins as possible. Copyright © 2002–2013, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: ADC12D040 |
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