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S25FL256SDPNFVC bảng dữ liệu(PDF) 1 Page - Cypress Semiconductor |
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S25FL256SDPNFVC bảng dữ liệu(HTML) 1 Page - Cypress Semiconductor |
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1 / 149 page  S25FL128S/S25FL256S 128 Mbit (16 Mbyte)/256 Mbit (32 Mbyte) 3.0V SPI Flash Memory Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-98283 Rev. *M Revised May 23, 2017 Features CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface (SPI) with Multi-I/O – SPI Clock polarity and phase modes 0 and 3 – Double Data Rate (DDR) option – Extended Addressing: 24- or 32-bit address options – Serial Command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P SPI families – Multi I/O Command set and footprint compatible with S25FL-P SPI family READ Commands – Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad DDR – AutoBoot - power up or reset and execute a Normal or Quad read command automatically at a preselected address – Common Flash Interface (CFI) data for configuration information. Programming (1.5 Mbytes/s) – 256 or 512 Byte Page Programming buffer options – Quad-Input Page Programming (QPP) for slow clock systems – Automatic ECC -internal hardware Error Correction Code generation with single bit error correction Erase (0.5 to 0.65 Mbytes/s) – Hybrid sector size option - physical set of thirty two 4-kbyte sectors at top or bottom of address space with all remaining sectors of 64 kbytes, for compatibility with prior generation S25FL devices – Uniform sector option - always erase 256-kbyte blocks for software compatibility with higher density and future devices. Cycling Endurance – 100,000 Program-Erase Cycles, minimum Data Retention – 20 Year Data Retention, minimum Security features – One Time Program (OTP) array of 1024 bytes – Block Protection: – Status Register bits to control protection against program or erase of a contiguous range of sectors. – Hardware and software control options – Advanced Sector Protection (ASP) – Individual sector protection controlled by boot code or password Cypress® 65 nm MirrorBit® Technology with Eclipse™ Architecture Core Supply Voltage: 2.7V to 3.6V I/O Supply Voltage: 1.65V to 3.6V – SO16 and FBGA packages Temperature Range / Grade: – Industrial (-40°C to +85°C) – Industrial Plus (-40°C to +105°C) – Automotive AEC-Q100 Grade 3 (-40°C to +85°C) – Automotive AEC-Q100 Grade 2 (-40°C to +105°C) – Automotive AEC-Q100 Grade 1 (-40°C to +125°C) Packages (all Pb-free) – 16-lead SOIC (300 mil) –WSON 6 x 8 mm – BGA-24 6 x 8 mm – 5 x 5 ball (FAB024) and 4 x 6 ball (FAC024) footprint options |
Số phần tương tự - S25FL256SDPNFVC |
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Mô tả tương tự - S25FL256SDPNFVC |
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