TMP93CS41 datasheet(124/248 Pages) TOSHIBA

124 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-122

Bit symbol

FF3C1

FF3C0

FF3TRG1

FF3TRG0

FF2C1

FF2C0

FF2TRG1

FF2TRG0

Read/Write

R/W

After reset

Function

00: Don’t care

01: Set TFF3

10: Clear TFF3

11: Don’t care

00: Disable TFF3 inverted.

01: Invert by match.

10: Set by match;

clear by overflow

11: Clear by match;

set by overflow.

00: Don’t care

01: Set TFF2

10: Clear TFF2

11: Don’t care

00: Disable TFF2 inverted.

01: Invert by match.

10: Set by match;

clear by overflow

11: Clear by match;

set by overflow.

Figure 3.8.7 8-Bit PWM Flip-flop Control Register

Disable TFF2 trigger.

Invert by compare and match.

Set by compare and match.

Clear by 2

− 1 overflow.

Clear by compare and match.

Set by 2

−1 overflow.

Select PWM timer flip-flop 2 (TFF2) trigger

Control PWM timer flip-flop 2 (TFF2)

Don’t care

Set TFF2 to “1”.

Clear TFF2 to “0”.

Don’t care

Select PWM timer flip-flop 3 (TFF3) trigger

Disable TFF3 trigger.

Invert by compare and match.

Set by compare and match.

Clear by 2

− 1 overflow.

Clear by compare and match.

Set by 2

− 1 overflow.

Control PWM timer flip-flop 3 (TFF3)

Don’t care

Set TFF3 to “1”.

Clear TFF3.

Don’t care

PFFCR

(002AH)

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