TMP93CS41 datasheet(53/248 Pages) TOSHIBA

53 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-51

(3) Micro DMA start vector

When the CPU reads the interrupt vector after accepting an interrupt, it

simultaneously compares the bits 2 to 6 of the interrupt vector with each channel’s

micro DMA start vector. When the two match, the interrupt from the channel whose

value matched is processed in micro DMA mode.

If the interrupt vector matches more than one channel, the channel with the lower

channel number has a higher priority.

Micro DMA 0 State Vector

DMA0V

Bit symbol

DMA0V4

DMA0V3

DMA0V2

DMA0V1

DMA0V0

(007CH)

Read/Write

After reset

Function

Micro DMA channel 0 processed by matching bits 2 to 6 of the interrupt vector.

Micro DMA 1 State Vector

DMA1V

Bit symbol

DMA1V4

DMA1V3

DMA1V2

DMA1V1

DMA1V0

(007DH)

Read/Write

After reset

Function

Micro DMA channel 1 processed by matching bits 2 to 6 of the interrupt vector.

Micro DMA 2 State Vector

DMA2V

Bit symbol

DMA2V4

DMA2V3

DMA2V2

DMA2V1

DMA2V0

(007EH)

Read/Write

After reset

Function

Micro DMA channel 2 processed by matching bits 2 to 6 of the interrupt vector.

Micro DMA 3 State Vector

DMA3V

Bit symbol

DMA3V4

DMA3V3

DMA3V2

DMA3V1

DMA3V0

(007FH)

Read/Write

After reset

Function

Micro DMA channel 3 processed by matching bits 2 to 6 of the interrupt vector.

Note: Read-modify-write is not possible for DMA0V to DMA3V.

Figure 3.4.7 Micro DMA State Vector Register

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