TMP93CS41 datasheet(14/248 Pages) TOSHIBA

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TMP93CS40/TMP93CS41

2004-02-10

93CS40-12

3.1.2

AM8/ AM16 Pin

(1) TMP93CS40

Set this pin to 1. Resetting accesses a built-in ROM via the internal 16-bit bus. When

accessing externally, the bus width is set by the chip select/wait control register

described in 3.6.3, and the registers of port 1.

(2) TMP93CS41

1. With fixed 16-bit data bus or with 16-bit data bus interchangeable with 8-bit data

bus.

Set this pin to 0. Port 1, AD8 to AD15 or A8 to A15 pins are fixed to AD8 to AD15

functions. Any values set in the port 1 control register or the port 1 function

The external data bus width is set by the chip select/wait control register.

After reset, it is necessary to set the program memory to be accessed, to 16-bit

data bus.

2. With fixed external 8-bit data bus

Set this pin to 1. Port 1, AD8 to AD15 or A8 to A15 pins are fixed to A8 to A15

functions. Any values set in the port 1 control register or the port 1 function

The values of Bit4 <B0BUS>, <B1BUS> and <B2BUS> in the chip select/wait

control register, which are described in 3.6.2, are invalid. The external 8-bit data

bus is fixed.

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