TMPR4937 datasheet(280/552 Pages) TOSHIBA

280 / 552 page

Chapter 10 PCI Controller

10-22

10.3.12.5 Special Programming

There may be some devices among PCI bus masters that operate differently from typical PCI

devices. PCI devices with the following characteristics can be made usable by changing the

programming of the PCI bus arbiter.

Bus masters that can not re-assert REQ unless GNT is once deasserted after deasserting REQ

•

Assign the bus master to a request port other than Port A through the PBAREQPORT

•

Enable the Fixed Parked Master (FIXPA) bit in the PBACFG register (at 0xD104).

Bus masters that initiate a PCI transaction even when the deassertion of GNT has taken away

their bus mastership before the start of the transaction

•

Assign the bus master to request port A, B, C or D through the PBAREQPORT register

(at 0xD100).

For example, a bus master with both of the above characteristics can be used by configuring the

PCI bus arbiter as follows:

Set the internal PCI bus arbiter to the fixed parked master.

Assign the TX4937 to request port A.

Assign the bus master to request port B.

If this bus master is connected to REQ[3] and broken master checking is to be enabled, values

to be written to the PBACFG and PBAREQPORT registers are as follows:

PBACFG (at 0xD104):

0x0000000B

PBAREQPORT (at 0xD100): 0x73546210

10.3.13 PCI Boot

Setting the configuration during boot up (ADDR[8:6]) makes it possible to set the reset exception

vector address of the TX49/H3 core to PCI Bus address 0x00_BFC0_0000.

Two windows of the memory space from the G-Bus to the PCI Bus space are used when in the PCI

Boot mode. The defaults of several registers are changed as indicated below.

•

G-Bus base address (G2GBASE):

0x0_1FC0_0000

•

Space size (G2PM2MASK):

4 MB

•

PCI Bus base address (G2PM2PBASE):

0x00_BFC0_0000

•

Initiator Memory Space 2 Enable (PCICCFG.G2PM2EN):

•

Bus Master bit (PCISTATUS.BM) [Only when in the Host mode]

•

Target Configuration Access Ready

(PCICSTAUTS.TCAR) [Only when in the Satellite mode]

Also, the on-chip PCI Bus Arbiter cannot be used when the PCI Boot mode is being used while in the

Satellite mode.

TMPR4937 bảng dữ liệu(PDF) 280 Page - Toshiba Semiconductor

TMPR4937 bảng dữ liệu(HTML) 280 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL