TMPR4937 datasheet(425/552 Pages) TOSHIBA

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Chapter 14 AC-link Controller

14-19

Bit

Mnemonic Field Name

Description

Read/Write

7:6

⎯

Reserved

⎯

RDYCLR: Clear CODEC Ready Bit

W1S

RDYCLR

Clear CODEC

Ready Bit

W1C

0: No effect

1: Clear CODEC[1:0] ready bits

[Note: This bit should only be written to reevaluate the CODEC

ready status after power-down command is sent to CODEC.]

MICSEL: MIC Selection.

R/W1S

MICSEL

MIC Selection

0: Indicates that PCM L&R (Slot 3&4) is selected for audio reception.

1: Indicates that MIC (Slot 6) is selected for audio reception.

W1S

0: No effect

1: Selects MIC (Slot 6) for audio reception.

WRESET: Assert Warm Reset.

R/W1S

WRESET

Assert Warm

Reset

0: Indicates that warm reset is not asserted.

1: Indicates that warm reset is asserted.

W1S

0: No effect

1: Asserts warm reset.

[Note 1: Do not assert warm reset during normal operation.]

[Note 2: The software must guarantee the warm reset assertion

time meets the AC’97 specification (1.0

µs or more).]

WAKEUP: Enable Wake-up.

R/W1S

WAKEUP

Enable Wake-up

0: Indicates that wake-up from low-power mode is disabled.

1: Indicates that wake-up from low-power mode is enabled. While

any SDIN signal is driven high, ACLC asserts ACLCPME interrupt

request to the interrupt controller.

W1S

0: No effect

1: Enables wake-up from low-power mode.

[Note: Do not enable wake-up during normal operation.]

LOWPWR: Enable AC-link Low-power Mode.

R/W1S

LOWPWR

Enable AC-link

low-power mode

0: SYNC and SDOUT signals are not forced to low.

1: SYNC and SDOUT signals are forced to low.

W1S

0: No effect

1: Forces SYNC and SDOUT signals low.

[Note: Do not enable AC-link low-power mode during normal

operation.]

ENLINK: Enable AC-link.

R/W1S

ENLINK

Enable AC-link

0: Indicates that the ACRESET* signal to AC-link is asserted.

1: Indicates that the ACRESET* signal to AC-link is not asserted.

W1S

0: No effect

1: Deasserts the ACRESET* signal to AC-link

[Note: The software must guarantee the ACRESET* signal

assertion time meets the AC’97 specification (1.0

µs or

more).]

Figure 14.4.1 ACCTLEN Register (3/3)

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