CS4397

20

DS333F1

cles in Single Speed, 2304 cycles in Double Speed and 4608 cycles in Quad Speed mode. The bias volt-

age on the outputs will be retained and MUTEC will go active at the completion of the ramp period.

The analog outputs will ramp to a normal state when this function transitions from the enabled to disabled

state. The ramp requires 1152 left/right clock cycles in Single Speed, 2304 cycles in Double Speed and

4608 cycles in Quad Speed mode. The MUTEC will release immediately on setting MUTE = 1.

The converter analog outputs will mute when enabled. The bias voltage on the outputs will be retained

and MUTEC will go active during the mute period.

Control Port / Hardware Mode Select - C/H

Pin 16, Input

Function:

Determines if the device will operate in either the Hardware Mode or Control Port Mode.

Mute Control - MUTEC

Pin 17, Output

Function:

The Mute Control pin goes low during power-up initialization, reset, muting, master clock to left/right clock

frequency ratio is incorrect or power-down. This pin is intended to be used as a control for an external mute

circuit to prevent the clicks and pops that can occur in any single supply system. Use of Mute Control is not

mandatory but recommended for designs requiring the absolute minimum in extraneous clicks

and pops.

Analog Ground - AGND

Pins 18 and 21, Inputs

Function:

Analog ground reference.

Differential Analog Outpus - AOUTR- , AOUTR+ and AOUTL- , AOUTL+

Pins 19, 20, 23 and 24, Outputs

Function:

The full scale differential analog output level is specified in the Analog Characteristics specifications table.

Analog Power - VA

Pin 22, Input

Function:

Power for the analog and reference circuits. Typically 5VDC.

Mute

DESCRIPTION

0

Enabled

1

Normal operation mode

C/H

DESCRIPTION

0

Hardware Mode Enabled

1

Control Port Mode Enabled