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PIC18F44J10-E/ML bảng dữ liệu(PDF) 329 Page - Microchip Technology

tên linh kiện PIC18F44J10-E/ML
Giải thích chi tiết về linh kiện  28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
PDF  358 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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PIC18F44J10-E/ML bảng dữ liệu(HTML) 329 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 327
PIC18F45J10 FAMILY
TABLE 23-25: A/D CONVERSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Max
Units
Conditions
130
TAD
A/D Clock Period
0.7
25.0(1)
μsTOSC based, VREF ≥ 2.0V
TBD
1
μs
A/D RC mode
131
TCNV
Conversion Time
(not including acquisition time) (Note 2)
11
12
TAD
132
TACQ
Acquisition Time (Note 3)
1.4
TBD
—
—
μs
μs
-40
°C to +85°C
0
°C ≤ to ≤ +85°C
135
TSWC
Switching Time from Convert
→ Sample
—
(Note 4)
Legend: TBD = To Be Determined
Note 1:
The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
2:
ADRES registers may be read on the following TCY cycle.
3:
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50
Ω.
4:
On the following cycle of the device clock.



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