LTC2414IGN datasheet(27/48 Pages) LINER

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LTC2414/LTC2418

241418fa

CIN

2414/18 F12

VINCM + 0.5VIN

RSOURCE

IN+

LTC2414/

LTC2418

CPAR

≅20pF

CIN

VINCM – 0.5VIN

RSOURCE

IN –

CPAR

≅20pF

RSOURCE (Ω)

100

10k

100k

2414/18 F13

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 3.75V

IN– = 1.25V

FO = GND

TA = 25°C

CIN = 0.01µF

CIN = 0.001µF

CIN = 100pF

CIN = 0pF

RSOURCE (Ω)

100

10k

100k

2414/18 F14

–10

–20

–30

–40

–50

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 1.25V

IN– = 3.75V

FO = GND

TA = 25°C

CIN = 0.01µF

CIN = 0.001µF

CIN = 100pF

CIN = 0pF

Figure 12. An RC Network at IN+ and IN–

Figure 13. +FS Error vs RSOURCE at IN+ or IN– (Small CIN)

Figure 14. –FS Error vs RSOURCE at IN+ or IN– (Small CIN)

APPLICATIO S I FOR ATIO

typical differential input resistance is 1.8M

Ω which will

generate a gain error of approximately 0.28ppm for each

ohm of source resistance driving IN+ or IN–. When FO =

HIGH (internal oscillator and 50Hz notch), the typical

differential input resistance is 2.16M

Ωwhichwillgenerate

a gain error of approximately 0.23ppm for each ohm of

source resistance driving IN+ or IN–. When FO is driven by

an external oscillator with a frequency fEOSC (external

conversion clock operation), the typical differential input

resistance is 0.28 • 1012/fEOSCΩ and each ohm of

source resistance driving IN+ or IN – will result in

1.78 • 10–6 • fEOSCppm gain error. The effect of the source

resistance on the two input pins is additive with respect to

this gain error. The typical +FS and –FS errors as a function

of the sum of the source resistance seen by IN+ and IN– for

large values of CIN are shown in Figures 15 and 16.

In addition to this gain error, an offset error term may also

appear. The offset error is proportional with the mismatch

between the source impedance driving the two input pins

IN+ and IN– and with the difference between the input and

reference common mode voltages. While the input drive

circuit nonzero source impedance combined with the

converter average input current will not degrade the INL

performance, indirect distortion may result from the modu-

lation of the offset error by the common mode component

of the input signal. Thus, when using large CIN capacitor

values, it is advisable to carefully match the source imped-

ance seen by the IN+ and IN– pins. When FO = LOW (internal

oscillator and 60Hz notch), every 1

Ω mismatch in source

impedance transforms a full-scale common mode input

signal into a differential mode input signal of 0.28ppm.

When FO = HIGH (internal oscillator and 50Hz notch), every

Ω mismatch in source impedance transforms a full-scale

common mode input signal into a differential mode input

signal of 0.23ppm. When FO is driven by an external

oscillator with a frequency fEOSC, every 1Ω mismatch in

source impedance transforms a full-scale common

mode input signal into a differential mode input signal of

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