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LTC2414IGN bảng dữ liệu(PDF) 15 Page - Linear Technology

tên linh kiện LTC2414IGN
Giải thích chi tiết về linh kiện  8-/16-Channel 24-Bit No Latency TM ADCs
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LTC2414IGN bảng dữ liệu(HTML) 15 Page - Linear Technology

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LTC2414/LTC2418
15
241418fa
Table 2. Channel Selection for the LTC2418
MUX ADDRESS
CHANNEL SELECTION
ODD/
SGL
SIGN
A2 A1 A0
0
123456789
10
11
12
13
14
15
COM
*
000
0
0
IN+
IN
000
0
1
IN+
IN
000
1
0
IN+
IN
000
1
1
IN+
IN
001
0
0
IN+
IN
001
0
1
IN+
IN
001
1
0
IN+
IN
001
1
1
IN+
IN
010
0
0
IN
IN+
010
0
1
IN
IN+
010
1
0
IN
IN+
010
1
1
IN
IN+
011
0
0
IN
IN+
011
0
1
IN
IN+
011
1
0
IN
IN+
011
1
1
IN
IN+
100
0
0
IN+
IN
100
0
1
IN+
IN
100
1
0
IN+
IN
100
1
1
IN+
IN
101
0
0
IN+
IN
101
0
1
IN+
IN
101
1
0
IN+
IN
101
1
1
IN+
IN
110
0
0
IN+
IN
110
0
1
IN+
IN
110
1
0
IN+
IN
110
1
1
IN+
IN
111
0
0
IN+
IN
111
0
1
IN+
IN
111
1
0
IN+
IN
111
1
1
IN+
IN
*Default at power up
APPLICATIO S I FOR ATIO
Output Data Format
The LTC2414/LTC2418 serial output data stream is 32 bits
long. The first 3 bits represent status information indicat-
ing the sign and conversion state. The next 23 bits are the
conversion result, MSB first. The next 5 bits (Bit 5 to Bit 1)
indicate which channel the conversion just performed was
selected. The address bits programmed during this data
output phase select the input channel for the next conver-
sion cycle. These address bits are output during the sub-
sequent data read, as shown in Figure 3b. The last bit is a



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