CYPAS213 datasheet(19/34 Pages) INFINEON

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Datasheet

002-37178 Rev. *B

2023-10-10

EZ-PD™ PAG2S-PS integrated USB PD and

synchronous-rectification controller

Electrical specifications

TR_SR1

Rise time

(1 V to VOH – 1 V) of

sync-rectifier gate

driver output with

CL = 3 nF, including

(with doubler mode)

––

–

TR_SR2

Rise time

(1 V to VOH – 1 V) of

sync-rectifier gate

driver output with

CL = 3 nF, including

(with doubler bypass

mode)

––

GPIO

I_LU

Latch up current limits –100

–

100

–

RPU

Pull-up resistor value

3.5

5.6

8.5

kΩ

RPD

Pull-down resistor

value

IIL

Input leakage current

(Absolute value)

–

+25°C TA, 3 V VDDD

CPIN_A

Max pin capacitance

Capacitance on DP, DM

pins

CPIN

Max pin capacitance

All VDDD,

all other GPIOs

Voh

Output voltage high

level

VDDD – 0.6

–

Ioh = -4 mA

Vol

Output voltage low

level

–

0.6

Iol = 10 mA

Vih_CMOS

Input voltage high

threshold

0.7 × VDDD

–

Vil_CMOS

Input voltage low

threshold

–0.3 × VDDD

Vih_TTL

LVTTL input

–

Vil_TTL

LVTTL input

–

0.8

Vhysttl

Input hysteresis LVTTL 80

–mV

Vhyscmos

Input hysteresis CMOS 0.1 × VDDD

IDIODE

Current through

protection diode to

VDDD/VSS

–

100

µA

TriseF

Rise time in Fast

Strong mode

Cload = 25 pF

TfallF

Fall time in Fast Strong

mode

–

TriseS

Rise time in Slow

Strong mode

TfallS

Fall time in Slow

Strong mode

Table 6

Functional block specifications (continued)

Parameter

Description

Min

Typ

Max

Unit

Details/conditions

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