VC0736 datasheet(23/127 Pages) NEXTCHIP

23 / 127 page

NVP6124

Data sheet

02.11.2015 (REV 0.2)

21/125

4-CH AHD2.0 RX and 9-CH Audio Codec

2.10.3

4-Multiplex Output Mode

In the 4-Multiplex Output Mode, NVP6124 output multiplexed 4-channels video through in a

port. But is not multiplex AHD2.0 resolution due to same VCLK frequency with AHD2.0

sampling frequency. Figure2.14 shown as multiplexed with 4-channels video output to

VDO1~VDO4. For VCLK1, VCLK2, VCLK3 and VCLK4 phase adjustment can be made against

VDO1~VDO4 using "Clock Delay Control" Register.

- (VCLK_x_SEL, 0xCC~CF[6:4], Control of Output Clock)

- (VCLK_x_DLY_SEL, 0xCC~CF[3:0], Control of Phase in Output Clock)

- (CH_OUT_SELx, 0xC8, 0xC9, Control how many multiplexed channel in a port)

CH3

CH2

CH3

CH2

CH1

CH4

All Port

(VDO1~VDO4)

Channel 1,2,3,4 data muxed @ 108MHz

/ 144MHz

/ 148.5MHz

108/144/148.5MHz

(VCLK1~VCLK04)

Separated data 1

Separated data 2

Separated data 3

Separated data 4

CH1

CH4

Muxing

ch1~4

ch1

time

multiplexer

VDOx

CHx_OUT_SEL

VCLK0x

VPORTx_SEQx

Muxing

ch1~4

ch2

Muxing

ch1~4

ch3

Muxing

ch1~4

ch4

data of CH1

data of mixed CH1,2

data of mixed CH1,2,3,4

CHx_OUT_SEL

VDOx

Figure 2.14. Block Diagram of Multiplexed 4-Channels Output

VC0736 bảng dữ liệu(PDF) 23 Page - NEXTCHIP Co,Ltd

VC0736 bảng dữ liệu(HTML) 23 Page - NEXTCHIP Co,Ltd

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL