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MC908QT4MPE bảng dữ liệu(PDF) 85 Page - Freescale Semiconductor, Inc |
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MC908QT4MPE bảng dữ liệu(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 184 page ![]() MC68HC908QY/QT Family Data Sheet, Rev. 5 Freescale Semiconductor 85 Chapter 10 Low-Voltage Inhibit (LVI) 10.1 Introduction This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the VDD pin and can force a reset when the VDD voltage falls below the LVI trip falling voltage, VTRIPF. 10.2 Features Features of the LVI module include: • Programmable LVI reset • Programmable power consumption • Selectable LVI trip voltage • Programmable stop mode operation 10.3 Functional Description Figure 10-1 shows the structure of the LVI module. LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are user selectable options found in the configuration register (CONFIG1). See Chapter 5 Configuration Register (CONFIG). Figure 10-1. LVI Module Block Diagram The LVI is enabled out of reset. The LVI module contains a bandgap reference circuit and comparator. Clearing the LVI power disable bit, LVIPWRD, enables the LVI to monitor VDD voltage. Clearing the LVI reset disable bit, LVIRSTD, enables the LVI module to generate a reset when VDD falls below a voltage, LOW VDD DETECTOR LVIPWRD STOP INSTRUCTION LVISTOP LVI RESET LVIOUT VDD > LVITRIP = 0 VDD ≤ LVITRIP = 1 FROM CONFIG FROM CONFIG VDD FROM CONFIG LVIRSTD LVI5OR3 FROM CONFIG |
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