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Keyboard Interrupt Module (KBI)

MC68HC908QY/QT Family Data Sheet, Rev. 5

Freescale Semiconductor

To determine the logic level on a keyboard interrupt pin, use the data direction register to configure the

pin as an input and then read the data register.

NOTE

Setting a keyboard interrupt enable bit (KBIEx) forces the corresponding

keyboard interrupt pin to be an input, overriding the data direction register.

However, the data direction register bit must be a 0 for software to read the

pin.

9.3.2 Keyboard Initialization

When a keyboard interrupt pin is enabled, it takes time for the internal pullup to reach a logic 1. Therefore

a false interrupt can occur as soon as the pin is enabled.

To prevent a false interrupt on keyboard initialization:

Mask keyboard interrupts by setting the IMASKK bit in the keyboard status and control register.

Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.

Write to the ACKK bit in the keyboard status and control register to clear any false interrupts.

Clear the IMASKK bit.

An interrupt signal on an edge-triggered pin can be acknowledged immediately after enabling the pin. An

interrupt signal on an edge- and level-triggered interrupt pin must be acknowledged after a delay that

depends on the external load.

Another way to avoid a false interrupt:

Configure the keyboard pins as outputs by setting the appropriate DDRA bits in the data direction

Write 1s to the appropriate port A data register bits.

Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.

9.4 Wait Mode

The keyboard module remains active in wait mode. Clearing the IMASKK bit in the keyboard status and

control register enables keyboard interrupt requests to bring the MCU out of wait mode.

9.5 Stop Mode

The keyboard module remains active in stop mode. Clearing the IMASKK bit in the keyboard status and

control register enables keyboard interrupt requests to bring the MCU out of stop mode.

9.6 Keyboard Module During Break Interrupts

The system integration module (SIM) controls whether the keyboard interrupt latch can be cleared during

the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status

bits during the break state.

To allow software to clear the keyboard interrupt latch during a break interrupt, write a 1 to the BCFE bit.

If a latch is cleared during the break state, it remains cleared when the MCU exits the break state.

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