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MB90F482PF bảng dữ liệu(PDF) 34 Page - fujitsu semiconductor

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MB90480/485 Series
34
3.
Expanded I/O Serial Interface
The expanded I/O serial interface is an 8-bit
× 1-channel serial I/O interface for clock synchronized data
transmission. A selection of LSB-first or MSB-first data transmission is provided.
There are two serial I/O operation modes.
(1) Register List
• Internal shift clock mode
: Data transmission is synchronized with the internal clock siganl.
• External shift clock mode
: Data transmission is synchronized with a clock signal input from the external
clock signal pin (SCK) . In this mode the general-purpose port that shares the
external clock signal pin (SCK) can be used for transmission according to
CPU instructions.
Serial mode control status register (SMCS)
Serial data register (SDR)
Communication prescaler control register (SDCR0, SDCR1)
Initial value
Address :
000027H
00002BH
00000010B
Address :
000026H
00002AH
----0000B
Address :
000028H
00002CH
XXXXXXXXB
Address :
000029H
00002DH
0---0000B
15
14
13
12
11
10
9
8
SMD1
SMD2
SMD0
SIE
SIR
BUSY
STOP
STRT
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
76
5
4
3
2
1
0

MODE
BDS
SOE
SCOE
R/W
R/W
R/W
R/W
76
5
4
3
2
1
0
D6
D7
D5
D4
D3
D2
D1
D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

R/W
R/W
R/W
R/W
15
14
13
12
11
10
9
8
R/W
MD

DIV3
DIV2
DIV1
DIV0



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