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DSP56652
DSP56652 Signal Description
Preliminary
MOTOROLA
DSP56652 Technical Data Sheet
1-21
Normal:
MUX_CTL driven low
INT7
SRDA
DTR
SCLK
Input or
Output
Input
Input
Input
Input
Interrupt 7
ÑWhen selected, this signal can be programmed as an
interrupt input or a GPIO signal, and has a 47k
W pull-up resistor.
As a Schmitt trigger interrupt input, the signal can be programmed
to be level sensitive, positive edge-triggered, or negative edge-
triggered. When edge-triggered, triggering occurs at a voltage level
and is not directly related to the fall time of the interrupt signal;
however, as signal fall time of the interrupt signal increases, the
probability of generating multiple interrupts due to this noise also
increases.
Audio codec serial receive data
(alternate)ÑWhen programmed as
SRDA, this signal receives data into the serial receive shift register in
the serial audio codec port.
Note:
When this signal is used as SRDA, the primary SRDA signal
is disabled. (See Table 1-18 on page 1-31.)
Data terminal ready
ÑWhen programmed as GPIO, this signal is
used as the DTR positive and negative edge-triggered interrupt
input for the serial data port. (See Table 1-15 on page 1-26.)
Serial clock
ÐWhen so programmed, this signal provides the input
clock for the serial data port (UART). (See Table 1-15 on page 1-26.)
The signal is a GPIO when not programmed as one of the above
functions. After reset, the default state for this signal is GPI.
Alternate:
MUX_CTL driven high
TMS
Input
Input
Test Mode Select
ÑWhen selected, this signal acts as the TMS input
for the JTAG TAP controller. The signal is used to sequence that
TAP controller state machine. The TMS is sampled on the rising
edge of TCK.
Note:
When this signal is enabled, the primary TMS signal is
disconnected from the TAP controller. (See Table 1-22
on page 1-36.)
Table 1-12
Interrupt Signals (Continued)
Signal
Name
Signal
Type
State
during
Reset
Signal Description
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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