DSP56600FMSLASHAD datasheet(60/76 Pages) NXP

tên linh kiện	DSP56600FM/AD

Giải thích chi tiết về linh kiện	INTEGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC

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Preliminary

2-18

DSP56651 Technical Data Sheet

MOTOROLA

Specifications

JTAG Port Timing

JTAG PORT TIMING

Table 2-14

JTAG Timing

Num

Characteristics

Expression

DSP @ 58.8 MHz

Unit

Min

Max

500

TCK frequency of operation

1/(3

× T

DC)

0.0

19.6

MHz

501

TCK cycle time in crystal mode

—

45.0

—

502

TCK clock pulse width measured at 1.5 V

—

20.0

—

503

TCK rise and fall times

—

0.0

3.0

504

Boundary scan input data setup time

—

5.0

—

505

Boundary scan input data hold time

—

24.0

—

506

TCK low to output data valid

—

0.0

40.0

507

TCK low to output high impedance

—

0.0

40.0

508

TMS, TDI data setup time

—

5.0

—

509

TMS, TDI data hold time

—

25.0

—

510

TCK low to TDO data valid

—

0.0

44.0

511

TCK low to TDO high impedance

—

0.0

44.0

512

TRST assert time

—

100.0

—

513

TRST setup time to TCK low

—

40.0

—

Figure 2-11

Test Clock Input Timing Diagram

TCK

(Input)

VIH

VIL

501

502

503

AA0496

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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