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DSP56600FM/AD bảng dữ liệu(PDF) 17 Page - NXP Semiconductors |
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DSP56600FM/AD bảng dữ liệu(HTML) 17 Page - NXP Semiconductors |
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17 / 76 page ![]() Pin and Signal Descriptions DSP56651 Signal Description Preliminary MOTOROLA DSP56651 Technical Data Sheet 1-11 Figure 1-3 Signals Identified by Functional Group DSP56651 16 22 External Address Bus External Data Bus External Bus Control Serial Data Port (UART) Timers PLL and Clocks JTAG Port Power Inputs: Address Bus Smart Card Bus Control Data Bus Audio Codec Clock Output GPIO/Keypad/Int/JTAG/UART/STO Baseband Codec/Timers/QSPI Quiet Power High Emulation Port PLL Internal Logic (Quiet) A0-A21 D0-D15 R/W EB0 EB1 OE TCK TDI TDO TMS TRST TEST CKIH CKIL CKO CKOH PCAP VCCA VCCB VCCC VCCD VCCE VCCF VCCG VCCH VCCHQ VCCK VCCP VCCQ Keypad Port 2 Grounds: Address Bus Smart Card Bus Control Data Bus Audio Codec Clock Output GPIO/Keypad/Int/JTAG Baseband Codec/Timers Emulation Port PLL PLL Internal Logic (Quiet) Substrate Ground GNDA GNDB GNDC GNDD GNDE GNDF GNDG GNDH GNDK GNDP GNDP1 GNDQ GND 4 2 Reset, Mode, and Multiplexer Control RESET_IN RESET_OUT MOD MUX_CTL STO COL0–COL5 COL6/OC1 COL7/PWM ROW0–ROW4 ROW5/IC2B ROW6/SC2A/DCD or DSP_DE ROW7/SCKA/RI or TCK TxD or TDO RxD/IC1 or TDI RTS/IC2 or RESET_IN CTS or MCU_DE TOUT0–TOUT7 2 2 4 4 Interrupts INT0–INT5 INT6/STDA/DSR or TRST INT7/SRDA/DTR/SCK or TMS DSP_IRQ 6 Debug Control Port MCU_DE DSP_DE 6 5 Serial Audio Codec Port STDA SRDA SCKA SC0A–SC2A Baseband Codec Port STDB SRDB SCKB SC0B–SC2B 8 3 3 Queued Serial Port SPICS0–SPICS4 SCK MISO MOSI 5 Smart Card Port SIMCLK SENSE SIMDATA SIMRESET PWR_EN Chip Selects CS0 CS1–CS4 CS5 4 Emulation Port SIZ0–SIZ1 PSTAT0–PSTAT3 4 2 20 AA1690 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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