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DA16200 bảng dữ liệu(PDF) 67 Page - Renesas Technology Corp

tên linh kiện DA16200
Giải thích chi tiết về linh kiện  Ultra Low Power Wi-Fi SoC
PDF  154 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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DA16200 bảng dữ liệu(HTML) 67 Page - Renesas Technology Corp

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DA16200
Ultra Low Power Wi-Fi SoC
Datasheet
Revision 3.6
04-Jan-2023
CFR0011-120-00
67 of 153
© 2023 Renesas Electronics
9.8
ADC (Aux 12-bit)
9.8.1
Overview
DA16200 includes a high precision, ultra-low power, and wide dynamic range SAR ADC with a 12-bit
resolution. It has a 4-channel single-end ADC.
Analog input is measured by four pins from GPIOA0 to GPIOA3, and pin selection is changed
through the register setting.
Figure 45 shows the control block diagram.
ADC
12b
Max : 1Ms
Counter
16-bit
Ready
CH_SEL
VI_N[1]
VI_N[2]
VI_N[3]
VI_N[4]
Figure 45: ADC Control Block Diagram
9.8.2
Timing Diagram
The input is digitized at a maximum of 1.0 Msps throughput rate. And the maximum input clock rate is
15 MHz.
Figure 46 shows the conversion timing, and Table 52 describes the DC specifications.
Figure 46: 12-bit ADC Timing Diagram
CLK
15MHz
SAMPLE
1M
CLKOUT
1M
AUXADC_EN
OSC_EN
D<11:0>
15*CLK
N
15*CLK
N+1
15*CLK
N+2
15*CLK
N+3
15*CLK
N+4
N
N+1
N+2
N+3
15*CLK



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