SH79F166APSLASH044PR datasheet(32/113 Pages) SINOWEALTH

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SH79F166A

7.6 System Clock Monitor (SCM)

In order to enhance the system reliability, SH79F166A contains a system clock monitor (SCM) module. If the system clock fails

(for example the oscillator stops oscillating), the built-in SCM will switch the OSCCLK to the internal 32k WDTCLK and set

system clock monitor bit (SCMIF) to 1. And the SCM interrupt will be generated when EA and ESCM is enabled. If the OSCCLK

comes back, SCM will switch the OSCCLK back to the oscillator and clears the SCMIF automatically.

Notes:

The SCMIF is read only register; it can be clear to 0 or set to 1 by hardware only.

If SCMIF is cleared, the SCM switches the system clock to the state before system clock fail automatically.

If Internal RC is selected as OSCCLK by code option (Refer to code option section for detail), the SCM can not work.

Table 7.14 System Clock Control Register

B2H

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

CLKCON

SCMIF

R/W

Reset Value

(POR/WDT/LVR/PIN)

Bit Number

Bit Mnemonic

Description

SCMIF

System Clock Monitor bit

0: Clear by hardware to indicate system clock is normal

1: Set by hardware to indicate system clock fails

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