SH79F166APSLASH044PR datasheet(20/113 Pages) SINOWEALTH

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SH79F166A

7.2 RAM

7.2.1 Features

SH79F166A provides both internal RAM and external RAM for random data storage. The internal data memory is mapped into

four separated segments:

 The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly addressable.

 The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only.

 The Special Function Registers (SFR, addresses 80H to FFH) are directly addressable only.

 The 256 bytes of external RAM(addresses 00H to FFH) are indirectly accessed by MOVX instructions.

The Upper 128 bytes occupy the same address space as SFR, but they are physically separate from SFR space. When an

instruction accesses an internal location above address 7FH, the CPU can distinguish whether to access the upper 128 bytes

data RAM or to access SFR by different addressing mode of the instruction.

Note: the unused address is unavailable in SFR.

1F2H

7FH

80H

0FFH

80H

00H

Upper

128 bytes

Internal

Ram

indirect accesses

Lower

128 bytes

Internal

Ram

direct or indirect

accesses

RESERVED

Extenal

RAM

SFR

Bank0

direct accesses

1E0H

0FFH

LCD RAM

SFR

Bank1

direct accesses

80H

0FFH

The Internal and External RAM Configuration

The SH79F166A provides traditional method for accessing of external RAM. Use MOVXA, @Ri or MOVX @Ri, A; to access

external low 256 bytes RAM; MOVX A, @DPTR or MOVX @DPTR, A also to access external 256 bytes RAM.

In SH79F166A the user can also use XPAGE register to access external RAM only with MOVX A, @Ri or MOVX @Ri, A

instructions. The user can use XPAGE to represent the high byte address of RAM above 256 Bytes.

But SH79F166A only has 256 bytes external RAM, XPAGE must be set as 0.

In Flash SSP mode, the XPAGE can also be used as sector selector (Refer to SSP Function).

7.2.2 Register

Table 7.3 Data Memory Page Register

F7H

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

XPAGE

XPAGE.5

XPAGE.4

XPAGE.3

XPAGE.2

XPAGE.1

XPAGE.0

R/W

Reset Value

(POR/WDT/LVR/PIN)

Bit Number

Bit Mnemonic

Description

5-0

XPAGE[5:0]

RAM Page Selector

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