R7FA6T2AB3CFP datasheet(29/93 Pages) RENESAS

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● Cload = 30 pF, 16 pins, Output frequency = 10 MHz

Leakage current of IO

= Σ (VOL × IOL) / Voltage + Σ ((VCC - VOH) × IOH) / Voltage

= (20 mA × 1 V) × 8 / 3.5 V + (1 mA × 0.5 V) × 12 / 3.5 V + ((VCC - (VCC - 0.5 V)) × 1 mA) × 12 / 3.5 V

= 45.7 mA + 1.71 mA + 1.71 mA

= 49.1 mA

Dynamic current of IO

= Σ IO (Cin + Cload) × IO switching frequency × Voltage

= ((8 pF × 16) × 10 MHz + (30 pF × 16) × 10 MHz) × 3.5 V

= 21.3 mA

Total power consumption

= Voltage × (Leakage current + Dynamic current)

= (80 mA × 3.5 V) + (49.1 mA + 21.3 mA) × 3.5 V

= 526 mW (0.526 W)

= Ta + θja × Total power consumption

= 100 °C + 36.0 °C/W × 0.526W

= 118.9 °C

2.3

AC Characteristics

2.3.1

Frequency

Table 2.14

Operation frequency value in high-speed mode

Parameter

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK)

—

240

MHz

Peripheral module clock (PCLKA)

—

120

Peripheral module clock (PCLKB)

—

Peripheral module clock (PCLKC)

—*2

—

Peripheral module clock (PCLKD)

—

120

Flash interface clock (FCLK)

—*1

—

Note 1. FCLK must run at a frequency of at least 4 MHz when programming or erasing the flash memory.

Note 2. When the ADC is used, the PCLKC frequency must be at least 1 MHz.

Table 2.15

Operation frequency value in low-speed mode

Parameter

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK)

—

MHz

Peripheral module clock (PCLKA)

—

Peripheral module clock (PCLKB)

—

Peripheral module clock (PCLKC) *2

—*2

—

Peripheral module clock (PCLKD)

—

Flash interface clock (FCLK)*1

—

Note 1. Programming or erasing the flash memory is disabled in low-speed mode.

Note 2. When the ADC is used, the PCLKC frequency must be set to at least 1 MHz.

RA6T2 Datasheet

2. Electrical Characteristics

R01DS0400EJ0120 Rev.1.20

Mar 31, 2022

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