71M6541DSLASHFSLASHG datasheet(122/166 Pages) MAXIM

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71M6541D/F/G and 71M6542F/G Data Sheet

122

Rev 5

Name

Location

Rst Wk

Dir

Description

RTC_P[16:14]

RTC_P[13:6]

RTC_P[5:0]

289B[2:0]

289C[7:0]

289D[7:2]

R/W

RTC adjust. See 2.5.4 Real-Time Clock (RTC).

0x0FFBF

≤ RTC_P ≤ 0x10040

Note: RTC_P[16:0] and RTC_Q[1:0] form a single 19-bit RTC adjustment value.

RTC_Q[1:0]

289D[1:0]

R/W

RTC adjust. See 2.5.4 Real-Time Clock (RTC).

Note: RTC_P[16:0] and RTC_Q[1:0] form a single 19-bit RTC adjustment value.

RTC_RD

2890[6]

R/W

Freezes the RTC shadow register so it is suitable for MPU reads. When

RTC_RD is read, it returns the status of the shadow register: 0 = up to date, 1

= frozen.

RTC_SBSC[7:0]

2892[7:0]

–

Time remaining until the next 1 second boundary. LSB = 1/128 second.

RTC_TMIN[5:0]

289E[5:0]

–

R/W The target minutes register. See RTC_THR below.

RTC_THR[4:0]

289F[4:0]

–

R/W

The target hours register. The RTC_T interrupt occurs when RTC_MIN

becomes equal to RTC_TMIN and RTC_HR becomes equal to RTC_THR.

RTC_WR

2890[7]

R/W

Freezes the RTC shadow register so it is suitable for MPU writes. When

RTC_WR is cleared, the contents of the shadow register are written to the

RTC counter on the next RTC clock (~500 Hz). When RTC_WR is read, it

returns 1 as long as RTC_WR is set. It continues to return one until the RTC

counter actually updates.

RTC_SEC[5:0]

RTC_MIN[5:0]

RTC_HR[4:0]

RTC_DAY[2:0]

RTC_DATE[4:0]

RTC_MO[3:0]

RTC_YR[7:0]

2893[5:0]

2894[5:0]

2895[4:0]

2896[2:0]

2897[4:0]

2898[3:0]

2899[7:0]

–

R/W

The RTC interface registers. These are the year, month, day, hour, minute

and second parameters for the RTC. The RTC is set by writing to these

registers. Year 00 and all others divisible by 4 are defined as a leap year.

SEC

00 to 59

MIN

00 to 59

00 to 23 (00 = Midnight)

DAY

01 to 07 (01 = Sunday)

DATE 01 to 31

01 to 12

00 to 99

Each write operation to one of these registers must be preceded by a write to

0x2890.

RTCA_ADJ[6:0]

2504[7:0]

40 –

R/W Analog RTC frequency adjust register.

RTM_E

2106[1]

R/W Real Time Monitor enable. When 0, the RTM output is low.

RTM0[9:8]

RTM0[7:0]

RTM1[7:0]

RTM2[7:0]

RTM3[7:0]

210D[1:0]

210E[7:0]

210F[7:0]

2110[7:0]

2111[7:0]

R/W

Four RTM probes. Before each CE code pass, the values of these registers

are serially output on the RTM pin. The RTM registers are ignored when

RTM_E = 0. Note that RTM0 is 10 bits wide. The others assume the upper

two bits are 00.

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