71M6541DSLASHFSLASHG datasheet(91/166 Pages) MAXIM

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71M6541D/F/G and 71M6542F/G Data Sheet

Rev 5

3.5

Data Flow and MPU/CE Communication

The data flow between the Compute Engine (CE) and the MPU is shown in Figure 30. In a typical

application, the 32-bit CE sequentially processes the samples from the voltage inputs on pins IA, VA,

IB, etc., performing calculations to measure active power (Wh), reactive power (VARh), A

2h, and V2h

for four-quadrant metering. These measurements are then accessed by the MPU, processed further and

output using the peripheral devices available to the MPU.

Both the CE and multiplexer are controlled by the MPU via shared registers in the I/O RAM and in RAM.

The CE outputs a total of six discrete signals to the MPU. These consist of four pulses and two interrupts:

•

CE_BUSY

•

XFER_BUSY

•

WPULSE, VPULSE (pulses for active and reactive energy)

•

XPULSE, YPULSE (auxiliary pulses)

These interrupts are connected to the MPU interrupt service inputs as external interrupts. CE_BUSY

indicates that the CE is actively processing data. This signal occurs once every multiplexer cycle (typically

396 µs), and indicates that the CE has updated status information in its CESTATUS register (CE RAM 0x80).

XFER_BUSY indicates that the CE is updating data to the output region of the RAM. This indication

occurs whenever the CE has finished generating a sum by completing an accumulation interval

determined by SUM_SAMPS[12:0], I/O RAM 0x2107[4:0], 2108[7:0], (typically every 1000 ms). Interrupts to

the MPU occur on the falling edges of the XFER_BUSY and CE_BUSY signals.

WPULSE and VPULSE are typically used to signal energy accumulation of real (Wh) and reactive (VARh)

energy. Tying WPULSE and VPULSE into the MPU interrupt system can support pulse counting.

XPULSE and YPULSE can be used to signal events such as sags and zero crossings of the mains voltage

to the MPU. Tying these outputs into the MPU interrupt system relieves the MPU from having to read the

CESTATUS register at every occurrence of the CE_BUSY interrupt in order to detect sag or zero crossing

events.

Figure 30: MPU/CE Data Flow

Refer to 5.3 CE Interface Description for additional information on setting up the device using the MPU

firmware.

MPU

I/O RAM (Configuration RAM)

Pulses

Samples

WPULSE

VPULSE

XPULSE

YPULSE

Control

Processed

Metering

Data

MUX

Interrupts

CECONFIG

CESTATUS

XRAM

CE_BUSY

XFER_BUSY

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