71M6541DSLASHFSLASHG datasheet(60/166 Pages) MAXIM

60 / 166 page

71M6541D/F/G and 71M6542F/G Data Sheet

Rev 5

Table 47: Selectable Resources using the DIO_Rn[2:0] Bits

Value in DIO_Rn[2:0]

Resource Selected for SEGDIOn or PB Pin

None

Reserved

T0 (counter0 clock)

T1 (counter1 clock)

High priority I/O interrupt (INT0)

Low priority I/O interrupt (INT1)

Note:

Resources are selectable only on SEGDIO2 through SEGDIO11 and the

PB pin. See Table 48 (71M6541D/F/G) and Table 52 (71M6542F/G).

When driving LEDs, relay coils etc., the DIO pins should sink the current into GNDD (as

shown in Figure 20, right), not source it from V3P3D (as shown in Figure 20, left). This is due

to the resistance of the internal switch that connects V3P3D to either V3P3SYS or VBAT. See

6.4.6 V3P3D Switch on page 144.

Sourcing current in or out of DIO pins other than those dedicated for wake functions, for

example with pull-up or pull-down resistors, must be avoided. Violating this rule leads to

increased quiescent current in sleep and LCD modes.

Figure 20: Connecting an External Load to DIO Pins

V3P3SYS

VBAT

V3P3D

DIO

GNDD

MISSION

BROWNOUT

LCD/SLEEP

LOW

HIGH

HIGH-Z

V3P3SYS

VBAT

V3P3D

DIO

GNDD

MISSION

BROWNOUT

LCD/SLEEP

LOW

HIGH

HIGH-Z

Not recommended

Recommended

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