71M6541DSLASHFSLASHG datasheet(120/166 Pages) MAXIM

120 / 166 page

71M6541D/F/G and 71M6542F/G Data Sheet

120

Rev 5

Name

Location

Rst Wk

Dir

Description

OPT_RXINV

2457[1]

–

R/W

Inverts result from OPT_RX comparator when 1. Affects only the UART input.

Has no effect when OPT_RX is used as a DIO input.

OPT_TXE [1:0]

2456[3:2]

00 –

R/W

Configures the OPT_TX output pin.

If LCD_MAP[51] = 0:

00 = DIO51, 01 = OPT_TX, 10 = WPULSE, 11 = VARPULSE

If LCD_MAP[51] = 1:

xx = SEG51

OPT_TXINV

2456[0]

–

R/W Invert OPT_TX when 1. This inversion occurs before modulation.

OPT_TXMOD

2456[1]

–

R/W

Enables modulation of OPT_TX. When OPT_TXMOD is set, OPT_TX is

modulated when it would otherwise have been zero. The modulation is applied

after any inversion caused by OPT_TXINV.

OSC_COMP

28A0[5]

–

R/W

Enables the automatic update of RTC_P and RTC_Q every time the temperature

is measured.

PB_STATE

SFR F8[0]

The de-bounced state of the PB pin.

PERR_RD

PERR_WR

SFR FC[6]

SFR FC[5]

R/W

The IC sets these bits to indicate that a parity error on the remote sensor has

been detected. Once set, the bits are remembered until they are cleared by

the MPU.

PLL_OK

SFR F9[4]

Indicates that the clock generation PLL is settled.

PLL_FAST

2200[4]

R/W

Controls the speed of the PLL and MCK.

1 = 19.66 MHz (XTAL * 600)

0 = 6.29 MHz (XTAL * 192)

PLS_MAXWIDTH[7:0]

210A[7:0]

FF FF R/W

PLS_MAXWIDTH[7:0] determines the maximum width of the pulse (low-going

pulse if PLS_INV=0 or high-going pulse if PLS_INV=1). The maximum pulse

width is (2*PLS_MAXWIDTH[7:0] + 1)*TI. Where TI is PLS_INTERVAL[7:0] in

units of CK_FIR clock cycles. If PLS_INTERVAL[7:0] = 0 or

PLS_MAXWIDTH[7:0] = 255, no pulse width checking is performed and the

output pulses have 50% duty cycle. See 2.3.6.2 VPULSE and WPULSE.

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