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MPC5675KFF0VMS2R bảng dữ liệu(PDF) 95 Page - NXP Semiconductors |
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MPC5675KFF0VMS2R bảng dữ liệu(HTML) 95 Page - NXP Semiconductors |
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95 / 147 page ![]() Electrical characteristics MPC5675K Microcontroller Data Sheet, Rev. 9 NXP Semiconductors 95 3.19.2 DRAM pads electrical specification (VDD_HV_DRAM = 2.5 V) Table 46. Output drive current @ VDDE = 3.3 V (±10%) No. Pad Name Drive Mode Minimum IOH (mA)1 Minimum IOL (mA)2 1 DRAM ACC 111 –16 16 2 DRAM DQ 3 DRAM CLK 1 I OH is defined as the current sourced by the pad to drive the output to VOH. 2 I OL is defined as the current sunk by the pad to drive the output to VOL. Table 47. DRAM pads AC electrical specifications (VDD_HV_DRAM = 3.3 V) No. Pad Name Prop. Delay (ns) L → H/H → L1 1 L → H signifies low-to-high propagation delay and H → L signifies high-to-low propagation delay. Output Slew rate Rise/Fall (V/ns) Drive Load (pF) Drive/Slew Rate Select MinMax MinMax MSB, LSB 1 DRAM ACC 1.4/1.4 2.4/2.4 3.1/2.5 5.6/5.4 5 111 1.7/1.7 2.7/2.7 0.9/1.1 1.7/2.0 20 111 2 DRAM DQ 1.4/1.4 2.4/2.4 3.1/2.5 5.6/5.4 5 111 1.7/1.7 2.7/2.7 0.9/1.1 1.7/2.0 20 111 3 DRAM CLK 1.4/1.4 2.4/2.4 3.1/2.5 5.7/5.7 5 111 1.6/1.6 2.6/2.6 1.1/1.3 2.3/2.3 20 111 Table 48. DRAM pads DC electrical specifications (VDD_HV_DRAM = 2.5 V) No. Symbol Parameter Condition Min Max Unit 1VDD_HV_DRAM SR I/O supply voltage — 2.3 2.7 V 2VDD_HV_DRAM_VREF CC Input reference voltage — 0.49 × VDD_HV_DRAM 0.51 × VDD_HV_DRAM V 3VDD_HV_DRAM_VTT CC Termination voltage 1 1 473 MAPBGA: Termination voltage can be supplied via package pins. 257 MAPBGA Termination voltage internally tied as the 257 MAPBGA does not provide DRAM interface. Disable ODT. —VDD_HV_DRAM_VREF – 0.04 VDD_HV_DRAM_VREF +0.04 V 4VIH CC Input high voltage — VDD_HV_DRAM_VREF +0.15 —V 5VIL CC Input low voltage — — VDD_HV_DRAM_VREF –0.15 V 6VOH CC Output high voltage — VDD_HV_DRAM_VTT +0.81 —V 7VOL CC Output low voltage — — VDD_HV_DRAM_VTT –0.81 V |
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