38B5 datasheet(55/70 Pages) RENESAS

55 / 70 page

MITSUBISHI MICROCOMPUTERS

38B5 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

PRELIMINAR

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

Buzzer Output Circuit

The 38B5 group has a buzzer output circuit. One of 1 kHz, 2 kHz and

4 kHz (at XIN = 4.19 MHz) frequencies can be selected by the buzzer

output control register (address 0EFD16). Either P43/BUZ01 or P20/

BUZ02/FLD0 can be selected as a buzzer output port by the output

port selection bits (b2 and b3 of address 0EFD16).

The buzzer output is controlled by the buzzer output ON/OFF bit

(b4).

Fig. 63 Block Diagram of Buzzer Output Circuit

Fig. 64 Structure of Buzzer Output Control Register

f(XIN)

1/1024

1/2048

1/4096

Port latch

Buzzer output

Buzzer output ON/OFF bit

Output port control signal

Port direction register

Divider

Buzzer output control register

(BUZCON: address 0EFD16)

Output frequency selection bits (XIN = 4.19 MHz)

00 : 1 kHz (f(XIN)/4096)

01 : 2 kHz (f(XIN)/2048)

10 : 4 kHz (f(XIN)/1024)

11 : Not available

Output port selection bits

00 : P20 and P43 function as ordinary ports.

01 : P43/BUZ01 functions as a buzzer output.

10 : P20/BUZ02/FLD0 functions as a buzzer output.

11 : Not available

Buzzer output ON/OFF bit

0 : Buzzer output OFF (“0” output)

1 : Buzzer output ON

Not used (return “0” when read)

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