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ADRF6755ACPZ-R7 bảng dữ liệu(PDF) 33 Page - Analog Devices |
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ADRF6755ACPZ-R7 bảng dữ liệu(HTML) 33 Page - Analog Devices |
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33 / 48 page ![]() Data Sheet ADRF6755 Rev. B | Page 33 of 48 Table 16. Register CR9 (Address 0x09), Charge Pump Current Setting Bit Description [7:4] Charge pump current1 0000 = 0.3125 mA (default) 0001 = 0.63 mA 0010 = 0.94 mA 0011 = 1.25 mA 0100 = 1.57 mA 0101 = 1.88 mA 0110 = 2.19 mA 0111 = 2.50 mA 1000 = 2.81 mA 1001 = 3.13 mA 1010 = 3.44 mA 1011 = 3.75 mA 1100 = 4.06 mA 1101 = 4.38 mA 1110 = 4.69 mA 1111 = 5.00 mA 3 Set to 0 2 Set to 0 1 Set to 0 0 Set to 0 1 Double-buffered. Loaded on a write to Register CR0. Table 17. Register CR10 (Address 0x0A), Reference Frequency Control Bit Description 7 Set to 01 6 R/2 divider setting1 0 = bypass R/2 divider (default) 1 = select R/2 divider 5 Reference frequency doubler (R-doubler) enable1 0 = disable doubler (default) 1 = enable doubler [4:0] 5-bit R-divider setting1 00000 = divide by 32 (default) 00001 = divide by 1 00010 = divide by 2 … 11110 = divide by 30 11111 = divide by 31 1 Double-buffered. Loaded on a write to Register CR0. Table 18. Register CR12 (Address 0x0C), PLL Power-Up Bit Description 7 Set to 0 6 Set to 0 5 Set to 0 4 Set to 1 3 Set to 1 2 Power down PLL 0 = power up PLL (default) 1 = power down PLL 1 Set to 0 0 Set to 0 Table 19. Register CR13 (Address 0x0D), Lock Detector Control 2 Bit Description 7 Set to 1 6 LDCount1 (see Table 7) 5 Set to 1 4 Set to 0 3 Set to 1 2 Set to 0 1 Set to 0 0 Set to 0 Table 20. Register CR14 (Address 0x0E), TXDIS Control Bit Description 7 TXDIS_LOCLK 0 = LO clock always running 1 = stop LO clock when TXDIS = 1 6 Set to 0 5 Set to 0 4 Set to 0 3 Set to 0 2 Set to 0 1 Set to 0 0 Set to 0 Table 21. Register CR23 (Address 0x17), Lock Detector Control 1 Bit Description 7 Set to 0 6 Set to 1 5 Set to 1 4 Lock detector enable 0 = lock detector disabled (default) 1 = lock detector enabled 3 Lock detector up/down count, LDCount0 (see Table 7) 2 Lock detector precision 0 = low, coarse (10 ns) 1 = high, fine (6 ns) 1 Set to 0 0 Set to 0 |
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