ADRF6755ACPZ-R7 datasheet(32/48 Pages) AD

32 / 48 page

ADRF6755

Data Sheet

Rev. B | Page 32 of 48

Table 9. Register CR0 (Address 0x00), Fractional Word 4

Bit

Description1

Fractional Word F7

Fractional Word F6

Fractional Word F5

Fractional Word F4

Fractional Word F3

Fractional Word F2

Fractional Word F1

Fractional Word F0 (LSB)

Double-buffered. Loaded on a write to Register CR0.

Table 10. Register CR1 (Address 0x01), Fractional Word 3

Bit

Description1

Fractional Word F15

Fractional Word F14

Fractional Word F13

Fractional Word F12

Fractional Word F11

Fractional Word F10

Fractional Word F9

Fractional Word F8

Double-buffered. Loaded on a write to Register CR0.

Table 11. Register CR2 (Address 0x02), Fractional Word 2

Bit

Description1

Fractional Word F23

Fractional Word F22

Fractional Word F21

Fractional Word F20

Fractional Word F19

Fractional Word F18

Fractional Word F17

Fractional Word F16

Double-buffered. Loaded on a write to Register CR0.

Table 12. Register CR3 (Address 0x03), Fractional Word 1

Bit

Description

Set to 0

Set to 1

Set to 0

Fractional Word F24 (MSB)1

Double-buffered. Loaded on a write to Register CR0.

Table 13. Register CR5 (Address 0x05), 5-Bit Reference

Divider Enable

Bit

Description

Set to 0

5-bit R-divider and divide-by-2 enable1

0 = disable 5-bit R-divider and divide-by-2 (default)

1 = enable 5-bit R-divider and divide-by-2

Set to 0

Double-buffered. Loaded on a write to Register CR0.

Table 14. Register CR6 (Address 0x06), Integer Word 2

Bit

Description1

Integer Word N7

Integer Word N6

Integer Word N5

Integer Word N4

Integer Word N3

Integer Word N2

Integer Word N1

Integer Word N0

Double-buffered. Loaded on a write to Register CR0.

Table 15. Register CR7 (Address 0x07), Integer Word 1 and

MUXOUT Control

Bit

Description

[7:4]

MUXOUT control

0000 = tristate

0001 = logic high

0010 = logic low

1101 = reference clock/2

1110 = RF fractional-N divider clock/2

Integer Word N111

Integer Word N101

Integer Word N91

Integer Word N81

Double-buffered. Loaded on a write to Register CR0.

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