PRT2011DAF4A datasheet(82/112 Pages) NXP

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i.MX RT1064 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 08/2020

NXP Semiconductors

Boot mode configuration

This section provides information on boot mode configuration pins allocation and boot devices interfaces

allocation.

6.1

Boot mode configuration pins

Table 72 provides boot options, functionality, fuse values, and associated pins. Several input pins are also

sampled at reset and can be used to override fuse values, depending on the value of BT_FUSE_SEL fuse.

The boot option pins are in effect when BT_FUSE_SEL fuse is ‘0’ (cleared, which is the case for an

unblown fuse). For detailed boot mode options configured by the boot mode pins, see the i.MX RT1064

Fuse Map document and the System Boot chapter in i.MX RT1064 Reference Manual (IMXRT1064RM).

6.2

Boot device interface allocation

The following tables list the interfaces that can be used by the boot process in accordance with the specific

boot mode configuration. The tables also describe the interface’s specific modes and IOMUXC allocation,

which are configured during boot when appropriate.

Table 72. Fuses and associated pins used for boot

Pad

Default setting on reset

eFuse name

Details

GPIO_AD_B0_04

100 K pull-down

BOOT_MODE0

GPIO_AD_B0_05

100 K pull-down

BOOT_MODE1

GPIO_B0_04

100 K pull-down

BT_CFG[0]

Boot Options, Pin value overrides

fuse settings for BT_FUSE_SEL =

‘0’. Signal Configuration as Fuse

Override Input at Power Up.

These are special I/O lines that

control the boot up configuration

during product development. In

production, the boot configuration

can be controlled by fuses.

GPIO_B0_05

100 K pull-down

BT_CFG[1]

GPIO_B0_06

100 K pull-down

BT_CFG[2]

GPIO_B0_07

100 K pull-down

BT_CFG[3]

GPIO_B0_08

100 K pull-down

BT_CFG[4]

GPIO_B0_09

100 K pull-down

BT_CFG[5]

GPIO_B0_10

100 K pull-down

BT_CFG[6]

GPIO_B0_11

100 K pull-down

BT_CFG[7]

GPIO_B0_12

100 K pull-down

BT_CFG[8]

GPIO_B0_13

100 K pull-down

BT_CFG[9]

GPIO_B0_14

100 K pull-down

BT_CFG[10]

GPIO_B0_15

100 K pull-down

BT_CFG[11]

Table 73. Boot trough NAND

PAD Name

IO Function

ALT

Comments

GPIO_EMC_00

semc.DATA[0]

ALT 0

—

GPIO_EMC_01

semc.DATA[1]

ALT 0

—

GPIO_EMC_02

semc.DATA[2]

ALT 0

—

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