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UPD17P136ACT bảng dữ liệu(PDF) 138 Page - NEC

tên linh kiện UPD17P136ACT
Giải thích chi tiết về linh kiện  4-BIT SINGLE-CHIP MICROCONTROLLER
PDF  292 Pages
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nhà sản xuất  NEC [NEC]
Trang chủ  http://www.nec.com/
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UPD17P136ACT bảng dữ liệu(HTML) 138 Page - NEC

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CHAPTER 13 PERIPHERAL HARDWARE
119
13.1.7 Error of Interval Time
The interval time may include an error of up to –1.5 count, especially if the value set value of the modulo register
is low.
(1) Error when count register is cleared to 0 during counting (maximum error: –1 count)
The count register of the 8-bit timer/counter is cleared to 0 when the TMnRES flag is set to 1. However, the
divider circuit that generates a count pulse from the system clock is not reset.
Therefore, an error of 1 cycle of the count pulse may be generated at the first count if the TMnRES flag is set
to 1 and the count value is cleared to 0 during counting. An example of counting where 2 is set to the modulo
register is shown below.
Figure 13-6. Error When Count Register Is Cleared to 0 During Counting
In this example, the coincidence signal must be output each time the count value has reached 3. However,
the coincidence signal is output when the count value reaches 2 for the first time after the count has been
cleared.
The above error also occurs when TMnRES
← 1 at the same time as TMnEN = 1 ← 0.
12
0
1
2
Count register
Count pulse
Output of coincidence signal
Count cleared (TMnRES
← 0)
2 to 3 counts



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