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NOTE
• Due to triple bonding in lower pin packages like 32-QFN,
48-LQFP, and 64-LQFP degradation might be seen in ADC
parameters.
• When using high speed interfaces such as the QuadSPI,
SAI0, SAI1 or ENET there may be some ADC degradation
on the adjacent analog input paths. See following table for
details.
Pin name
TGATE purpose
PTE8
CMP0_IN3
PTC3
ADC0_SE11/CMP0_IN4
PTC2
ADC0_SE10/CMP0_IN5
PTD7
CMP0_IN6
PTD6
CMP0_IN7
PTD28
ADC1_SE22
PTD27
ADC1_SE21
6.4.2 CMP with 8-bit DAC electrical specifications
Table 44. Comparator with 8-bit DAC electrical specifications for S32K1xx series
Symbol
Description
Min.
Typ.
Max.
Unit
IDDHS
Supply current, High-speed mode1
μA
-40 - 125
℃
—
230
300
IDDLS
Supply current, Low-speed mode1
μA
-40 - 105
℃
—
6
11
-40 - 125
℃
6
13
VAIN
Analog input voltage
0
0 - VDDA
VDDA
V
VAIO
Analog input offset voltage, High-speed mode
mV
-40 - 125
℃
-25
±1
25
VAIO
Analog input offset voltage, Low-speed mode
mV
-40 - 125
℃
-40
±4
40
tDHSB
Propagation delay, High-speed mode2
ns
-40 - 105
℃
—
35
200
-40 - 125
℃
35
300
tDLSB
Propagation delay, Low-speed mode2
µs
-40 - 105
℃
—
0.5
2
-40 - 125
℃
—
0.5
3
tDHSS
Propagation delay, High-speed mode3
ns
-40 - 105
℃
—
70
400
Table continues on the next page...
ADC electrical specifications
S32K1xx Data Sheet, Rev. 12, 02/2020
NXP Semiconductors
59



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