PFS172 datasheet(38/92 Pages) PADAUK

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PFS172

8bit MTP MCU with 8-bit ADC

Page 38 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

5.5.2

Using the comparator

Case I:

Choosing PA3 as minus input and Vinternal R with (18/32)*VDD voltage level as plus input. Vinternal R is

configured as the above Figure “gpcs[5:4] = 2b’00” and gpcs [3:0] = 4b’1001 (n=9) to have Vinternal R =

(1/4)*VDD + [(9+1)/32]*VDD = [(9+9)/32]*VDD = (18/32)*VDD.

gpcs

= 0b0_0_00_1001;

// Vinternal R = VDD*(18/32)

gpcc

= 0b1_0_0_0_000_0;

// enable comp, - input: PA3, + input: Vinternal R

padier = 0bxxxx_0_xxx;

// disable PA3 digital input to prevent leakage current

$ GPCS

VDD*18/32;

$ GPCC

Enable, N_PA3, P_R;

// - input: N_xx, + input: P_R(

Vinternal R)

PADIER = 0bxxxx_0_xxx;

Case 2:

Choosing Vinternal R as minus input with (22/40)*VDD voltage level and PA4 as plus input, the comparator

result will be inverted and then output to PA0. Vinternal R is configured as the above Figure “gpcs[5:4] =

2b’10” and gpcs [3:0] = 4b’1101 (n=13) to have Vinternal R = (1/5)*VDD + [(13+1)/40]*VDD = [(13+9)/40]*VDD

= (22/40)*VDD.

gpcs

= 0b1_0_10_1101;

// output to PA0,Vinternal R = VDD*(22/40)

gpcc

= 0b1_0_0_1_011_1;

// Inverse output, - input: Vinternal R, + input: PA4

padier

= 0bxxx_0_xxxx;

// disable PA4 digital input to prevent leakage current

$ GPCS

Output, VDD*22/40;

$ GPCC

Enable, Inverse, N_R, P_PA4;

// - input: N_R(

Vinternal R), + input: P_xx

PADIER = 0bxxx_0_xxxx;

Note: When selecting output to PA0 output, GPCS will affect the PA3 output function in ICE. Though the

IC is fine, be careful to avoid this error during emulation.

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